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| PRELIMINARY PLL650-10 Network LAN Clock for Gigabit Ethernet FEATURES * * * * * * * * PIN CONFIGURATION Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. Two outputs fixed at 125MHz.. Zero PPM synthesis error in all clocks. Ideal for Network switches. 3.3V operation. Available in 8-Pin 150mil SOIC. XIN XOUT GND 125MHz 1 2 3 4 8 7 6 5 VDD GND VDD 125MHz P LL 650-10 DESCRIPTIONS The PLL 650-10 is a low cost, low jitter, and high performance clock synthesizer. With PhaseLink's proprietary analog Phase Locked Loop techniques, the chip accepts 25MHz crystal, and produces multiple output clocks for networking chips, and ASICs. BLOCK DIAGRAM 125MHz XIN XO UT XTAL OS C C ontrol Logic 125MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 12/10/02 Page 1 PRELIMINARY PLL650-10 Network LAN Clock for Gigabit Ethernet PIN DESCRIPTIONS Name XIN XOUT 125MHz VDD GND Number 1 2 4,5 6,8 3,7 Type I O O P P Description 25MHz fundamental crystal input (20pF CL parallel resonant). CL have been integrated into the chip. No external CL capacitor is required. Crystal connection pin. 125MHz outputs. 3.3V power supply Ground. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 12/10/02 Page 2 PRELIMINARY PLL650-10 Network LAN Clock for Gigabit Ethernet Electrical Specifications 1. Absolute Maximum Ratings PARAMETERS Supply Voltage Range Input Voltage Range Output Voltage Range Soldering Temperature Storage Temperature Ambient Operating Temperature TS -65 0 SYMBOL V CC VI VO MIN. MAX. 7 V CC +0.5 V CC +0.5 260 150 70 UNITS V V V C C C -0.5 -0.5 -0.5 Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. 2. AC Specification PARAMETERS Input Frequency Output Rise Time Output Fall Time Duty Cycle Max. Absolute Jitter Max. Jitter, cycle to cycle 0.8V to 2.0V with no load 2.0V to 0.8V with no load At VDD/2 Short term 45 50 150 80 CONDITIONS MIN. 10 TYP. 25 MAX. 27 1.5 1.5 55 UNITS MHz ns ns % ps ps 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 12/10/02 Page 3 PRELIMINARY 3. DC Specification PARAMETERS Operating Voltage Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output High Voltage At CMOS Level Operating Supply Current Short-circuit Current Nominal output current* Nominal output current* PLL650-10 MAX. 3.47 Network LAN Clock for Gigabit Ethernet SYMBOL VDD VIH VIL VIH VIL VOH VOL VOH IDD IS Iout Iout CMOS output level TTL output level 35 20 For all normal input For all normal input IOH = -25mA IOL = 25mA IOH = -8mA No Load VDD-0.4 35 100 40 25 2.4 0.4 2 0.8 CONDITIONS MIN. 3.13 TYP. VDD/2 VDD/2 UNITS V V V V V V V V mA mA mA mA VDD/2 - 1 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 12/10/02 Page 4 PRELIMINARY PLL650-10 Network LAN Clock for Gigabit Ethernet PACKAGE INFORMATION 8 PIN Narrow SOIC ( mm ) SOIC Symbol A A1 B C D E H L e Min. 1.35 0.10 0.33 0.19 9.80 3.80 5.80 0.40 1.27 BSC Max. 1.75 0.25 0.51 0.25 10.00 4.00 6.20 1.27 A1 B A C L e D E H ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL650-10 S C PART NUMBER TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Re v 12/10/02 Page 5 |
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